Amplified Ear Circuit

Useful to listen in faint sounds, 1.5V Battery operation

This circuit, connected to 32 Ohm impedance mini-earphones, can detect very remote sounds. Useful for theatre, cinema and lecture goers: every word will be clearly heard. You can also listen to your television set at a very low volume, avoiding to bother relatives and neighbors. Even if you have a faultless hearing, you may discover unexpected sounds using this device: a remote bird twittering will seem very close to you.

Circuit Diagram:

Amplified Ear Circuit Diagram

        

Parts :

P1 = 22K
R1 = 10K
R2 = 1M
R3 = 4K7
R4 = 100K
R5 = 3K9
R6 = 1K5
R7 = 100K
R8 = 100R
R9 = 10K
C1 = 100nF 63V
C2 = 100nF 63V
C3 = 1µF 63V
C4 = 10µF 25V
C5 = 470µF 25V
C6 = 1µF 63V
D1 = 1N4148
Q1 = BC547
Q2 = BC547
Q3 = BC547
Q4 = BC337
J1 = Stereo 3mm. Jack socket
B1 = 1.5V Battery (AA or AAA cell etc.)
SW1 = SPST Switch (Ganged with P1)
MIC1 = Miniature electret microphone

Circuit Operation :

The heart of the circuit is a constant-volume control amplifier. All the signals picked-up by the microphone are amplified at a constant level of about 1 Volt peak to peak. In this manner very low amplitude audio signals are highly amplified and high amplitude ones are limited. This operation is accomplished by Q3, modifying the bias of Q1 (hence its AC gain) by means of R2.
A noteworthy feature of this circuit is 1.5V battery operation. Typical current drawing: 7.5mA.

Notes:

• Due to the constant-volume control, some users may consider P1 volume control unnecessary. In most cases it can be omitted, connecting C6 to C3. In this case use a SPST slider or toggle switch as SW1.
• Please note the stereo output Jack socket (J1) connections: only the two inner connections are used, leaving open the external one. In this way the two earpieces are wired in series, allowing mono operation and optimum load impedance to Q4 (64 Ohm).
• Using suitable miniature components, this circuit can be enclosed in a very small box, provided by a clip and hanged on ones clothes or slipped into a pocket.
• Gary Pechon from Canada reported that the Amplified Ear is so sensitive that he can hear a whisper 7 meters across the room.
• He hooked a small relay coil to the input and was able to locate power lines in his wall. He was also able to hear the neighbors stereo perfectly: he could pick up the signals sent to the speaker voice coil through a plaster wall.
• Gary suggests that this circuit could make also a good electronic stethoscope.

Source by : Streampowers

Inductance Meter Adapter Circuit

The inductance meter adapter circuit output is connected with a frequency meter and the inductance is calculated from the frequency. So, you will need a frequency meter and some calculation to get your inductor value. The circuit enables to measure inductance of the inductor which is the inductance to be measured. The operation of the circuit is built by a TTL square wave whose frequency relates to the inductance being measured. This the figure of the circuit;


How is the circuit work? The core of the circuit is the buffer colpitts oscillator(the first stage) which resonates with the unknown inductance to give a sinus wave of a particular frequency . The frequency of the sinus wave is a function of the unknown inductance and the four 1000pF C. The output sinus wave is amplified by the second transistor and is then rectified by the capacitor and diode combination that follows. The rectified sine wave now having only positive excursions is buffered by the third transistor and is then fed to the 74ls393. Counter IC which is configured as a divide by 256 counters. The output of the IC pin 6 and ground is connected to the frequency meter.

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Digital Dice With 7 Segment Display

A digital dice circuit can be easily realised using an astable oscillator circuit followed by a counter, display driver and a display. Here we have used a timer NE555 as an astable oscillator with a frequency of about 100 Hz. Decade counter IC CD4026 or CD4033 (which-ever available) can be used as counter-cum-display driver. When using CD4026, pin 14 (cascading output) is to be left unused (open), but in case of CD4033, pin 14 serves as lamp test pin and the same is to be grounded.

Circuit diagram :

Digital Dice With 7-Segment Display Circuit diagram

The circuit uses only a handful of components. Its power consumption is also quite low because of use of CMOS ICs, and hence it is well suited for battery operation. In this circuit two tactile switches S1 and S2 have been pro-vided. While switch S2 is used for initial resetting of the display to ‘0,’ depression of S1 simulates throwing of the dice by a player. 

When battery is connected to the circuit, the counter and display section around IC2 (CD4026/4033) is energised and the display would normally show ‘0’, as no clock input is available. Should the display show any other decimal digit, you may press re-set switch S2 so that display shows ‘0’. To simulate throwing of dice, the player has to press switch S1, briefly. This ex-tends the supply to the astable oscillator configured around IC1 as well as capacitor C1 (through resistor R1), which charges to the battery voltage. Thus even after switch S1 is released, the astable circuit around IC1 keeps producing the clock until capacitor C1 discharges sufficiently. Thus for du-ration of depression of switch S1 and discharge of capacitor C1 thereafter, clock pulses are produced by IC1 and applied to clock pin 1 of counter IC2, whose count advances at a frequency of 100 Hz until C1 discharges sufficiently to deactivate IC1. 

When the oscillations from IC1 stop, the last (random) count in counter IC2 can be viewed on the 7-segment display. This count would normally lie between 0 and 6, since at the leading edge of every 7th clock pulse, the counter is reset to zero. This is achieved as follows. 

Observe the behavior of ‘b’ segment output in the Table. On reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it changes to low level and remains so during count 6. However, at start of count 7, the output goes from low to high state. A differentiated sharp high pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to reset the output to ‘0’ for a fraction of a pulse period (which is not visible on the 7-segment display). Thus, if the clock stops at seventh count, the display will read zero. There is a probability of one chance in seven that display would show ‘0.’ In such a situation, the concerned player is given an-other chance until the display is non-zero. 

Note.  Although it is quite feasible to inhibit display of ‘0’ and advance the counter by ‘1,’ the same makes the circuit somewhat complex and there-fore such a modification has not been attempted. 

 

 

 

Source by : Streampowers